1. Field of the Invention
This invention relates to the field of data processing systems. More particularly, this invention relates to data processing systems operable to execute variable length instructions stored within a plurality of memory address regions, e.g. a program fragmented within the memory.
2. Description of the Prior Art
It is known to provide data processing systems which execute variable length instructions. An example of such systems are the Jazelle enabled processors produced by ARM Limited. These processors are capable of executing programs formed of Java bytecodes that vary in their byte length. It is desirable within such systems in some circumstances to allow a program formed of variable length instructions to be stored in a plurality of different memory regions, i.e. for the program to be fragmented in memory. In a secure system such fragmentation may be desirable as a way of obfuscating the computer program concerned. In other circumstances it may be desirable in order to better use of the memory available by filling all portions of that memory even if they are discrete.
FIG. 1 of the accompanying drawings illustrates a problem which can arise in such systems. In particular, FIG. 1 illustrates a variable length program instruction which is three bytes in length and comprises a bytecode BCX followed by two operands OpdXOpdX′. This 3-byte instruction spans two discrete memory regions with the first byte being in a current memory region and the second and third bytes being in a following memory region. Standard hardware for executing such variable length instructions assumes all the bytes of a variable length instruction will be found at sequentially adjacent memory addresses. In the case illustrated in FIG. 1, the standard hardware would assume that the second and third bytes of the variable length instruction immediately followed the first byte of the variable length instruction, whereas in fact they are in a discrete memory region separated from the first byte.
The present invention recognises the problems associated with supporting variable length instructions of a program which is stored in a fragmented manner within the memory as well as providing a solution to these problems.